2.8.3. Programmers model overview

Table 2.28 shows the APB-AP registers.

Table 2.28. APB-AP registers

Offset TypeWidthReset valueName
0x00R/W320x00000002Control/Status Word, CSW
0x04R/W320x00000000Transfer Address, TAR
0x08---Reserved SBZ
0x0CR/W32-Data Read/Write, DRW
0x10R/W32-Banked Data 0, BD0
0x14R/W32-Banked Data 1, BD1
0x18R/W32-Banked Data 2, BD2
0x1CR/W32-Banked Data 3, BD3
0x20-0xF4---Reserved SBZ
0xF8RO320x80000000Debug ROM Address, ROM
0xFCRO320x14770002Identification Register, IDR

The APB-AP registers are described in:

Copyright © 2004-2009 ARM. All rights reserved.ARM DDI 0314H
Non-Confidential