11.5.4. Selected Pin Protocol Register, SPPR, 0xF0

This register selects which protocol to use for trace outputting. The register is defined in Table 11.6, and the supported values allowed in the register are determined by bits [11:9] of the Device ID Register, Table 11.4. When only one protocol is supported on a component, this device is read only and set as the appropriate protocol.

Figure 11.3 shows the Selected Pin Protocol Register bit assignments.

Figure 11.3. Selected Pin Protocol Register bit assignments

Table 11.6. Selected Pin Protocol Register bit assignments

[31:2]-Reserved RAZ/SBZP.

Select the pin protocol where multiple types are supported:

0x1 = Single Wire Output (Manchester). This is the reset value.

0x2 = Single Wire Output (NRZ).

The selection of unsupported protocols can result in unpredictable behavior. Values 0x0 and 0x3 are reserved.

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