2.9. JTAG-AP

The JTAG Access Port (JTAG-AP) provides JTAG access to on-chip components, operating as a JTAG master port to drive JTAG chains throughout a SoC. The JTAG command protocol is byte-orientated, with a word wrapper on the read and write ports to yield acceptable performance from the DAP internal bus which has a 32-bit data path only. Daisy chaining is avoided by using a port multiplexor. In this way, slower cores do not impede faster cores. For more information about the JTAG-AP, see the description of the JTAG-AP in the ARM Debug Interface v5 Architecture Specification and the ARM Debug Interface v5.1 Architecture Supplement.

The implementation specific features of the JTAG-AP is described in the following sections

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