2.12. ROM table

The DAP provides an internal ROM table connected to the master Debug APB port of the APB-Mux. The Debug ROM table is loaded at address 0x00000000 and 0x80000000 of this bus and is accessible from both APB-AP and the system APB input. Bit [31] of the address bus is not connected to the ROM Table, ensuring that both views read the same value. The ROM table stores the locations of the components on the Debug APB. See the CoreSight Architecture Specification for more information.

The ROM table has a standard APB interface except for the exclusion of PWRITEDBG and PWDATADBG. All transfers are assumed to be reads. The ROM table is a read-only device and writes are ignored.

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