10.2.1. Clocks and resets

The SWV implements three clock and reset domains:


Although no ATB interface is provide on SWV, the clock and reset is provided for integration outside of SWV. For standalone applications of SWV, it is recommended to connect ATCLK to TRACECLKIN, ATRESETn to TRESETn, and to tie ATCLKEN to HIGH.

Copyright © 2004-2009 ARM. All rights reserved.ARM DDI 0314H