11.4.4. Lock Status Register, 0xFB4 [2:0]
The Lock Status Register indicates the status of the lock
control mechanism, and is used in conjunction with the Lock Access
Register.
Table 11.3 shows
the bit assignments.
Table 11.3. Lock Status Register bit assignments
| Bits | Name | Description |
|---|
| [31:3] | - | Reserved RAZ/SBZP. |
| [2] | 8-BIT | Access Lock Register size. This bit reads 0
to indicate a 32-bit register is present. |
| [1] | STATUS | Lock Status. This bit is HIGH when the device
is locked, and LOW when unlocked. |
| [0] | IMP | Lock mechanism is implemented. This bit always
reads 1. |
Note
When PADDRDBG31 is HIGH,
the Lock Access Mechanism is bypassed and the Lock Status Register
does not reflect the actual status of the Lock Access, and the register reads
zero.
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