4.4.10. CTI Channel In Status Register, CTICHINSTATUS, 0x138

The CTI Channel In Status Register provides the status of the CTI CTICHIN inputs.

Figure 4.12 shows the bit assignments.

Figure 4.12. CTI Channel In Status Register bit assignments


Table 4.11 shows the bit assignments.

Table 4.11. CTI Channel In Status Register bit assignments

BitsNameDescription
[31:4]-Reserved RAZ DNM.
[3:0]CTICHINSTATUS

Shows the status of the CTICHIN inputs:

1 = CTICHIN is active

0 = CTICHIN is inactive.

Because the register provides a view of the raw CTICHIN inputs from the CTM, the reset value is unknown. There is one bit of the register for each channel input.


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