2.10. Auxiliary Access Port

An auxiliary interface is supplied to enable connecting to the access port of processors that have a compliant debug interface, such as the Cortex-M3. This interface is selected when the APSelect bits (bits [31:24] of the SELECT register in the Debug Port) are set to 0x03.

If this interface is not used then reads to the AP Identification Register (IDR) return 0x00000000, which indicates that no AP is present. See the applicable Integration Manual for more details of wiring this interface when not required. For more information on reading the IDR, see the ARM Debug Interface v5 Architecture Specification and the ARM Debug Interface v5.1 Architecture Supplement.

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