12.8.2. Integration Test Trigger Out Register, ITTRIGOUT, 0xEE8

Figure 12.10 shows the Integration Test Trigger Out Register bit assignments.

Figure 12.10. Integration Test Trigger Out Register bit assignments


Table 12.11 shows the Integration Test Trigger Out Register bit assignments.

Table 12.11. Integration Test Trigger Out Register bit assignments

BitsNameDescription
[31:1]-Reserved RAZ/SBZP
[0]ITTRIGOUTSet the value of TRIGOUT

Copyright © 2004-2009 ARM. All rights reserved.ARM DDI 0314H
Non-Confidential