8.1. About the Trace Port Interface Unit

The TPIU acts as a bridge between the on-chip trace data, with separate IDs, to a data stream, encapsulating IDs where required, that is then captured by a Trace Port Analyzer (TPA). Figure 8.1 shows the main blocks of the TPIU and the clock domains.

Figure 8.1. TPIU block diagram

The behavior of the blocks is as follows:


Inserts source ID signals into the data packet stream so that trace data can be re-associated with its trace source. See TPIU formatter and FIFO.

Asynchronous FIFO

Enables trace data to be driven out at a speed that is not dependent on the on-chip bus clock.

Register bank

Contains the management, control and status registers for triggers, flushing behavior and external control.

Trace out

The trace out block serializes formatted data before it goes off-chip.

Pattern Generator

The pattern generator unit provides a simple set of defined bit sequences or patterns that can be output over the Trace Port and be detected by the TPA or other associated Trace Capture Device (TCD). The TCD can use these patterns to indicate if it is possible to increase or to decrease the trace port clock speed. See TPIU pattern generator for more information.

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