2.4.1. Overview

The SW-DP provides a low pin count bi-directional serial connection to the DAP with a reference clock signal for synchronous operation.

Communications with the SW-DP use a three-phase protocol:

A packet request from a debugger indicates whether the required access is to a DP register (DPACC) or to an AP register (APACC), and includes a two-bit register address. The protocol is described in detail in the ARM Debug Interface v5 Architecture Specification and the ARM Debug Interface v5.1 Architecture Supplement.

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