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There are four read-only Component Identification Registers, ComponentID3 to ComponentID0. Although these are implemented as standard 32-bit registers:
The most significant 24 bits of each register are not used and Read-As-Zero
The least significant 8 bits of each register together make up the component ID.
This concept of a single 32-bit component ID, obtained from the four Component Identification Registers, is shown in Figure 2.4:
Table 2.6 lists the values of the fields when reading the CoreSight ETM9 Component Identification Registers. This, again, shows how the valid fields combine to give the component ID. This register structure is as defined in the CoreSight Architecture Specification.
Table 2.6. Component Identification Registers, bit assignments
| Register | Register offset | Bit | Value | Description |
|---|---|---|---|---|
| ComponentID3 | 0xFFC | [31:8] | - | Unused, read undefined |
| [7:0] | 0xB1 | Component identifier, bits[31:24] | ||
| ComponentID2 | 0xFF8 | [31:8] | - | Unused, read undefined |
| [7:0] | 0x05 | Component identifier, bits[23:16] | ||
| ComponentID1 | 0xFF4 | [31:8] | - | Unused, read undefined |
| [7:4] | 0x9 | Component class (component identifier, bits[15:12]) | ||
| [3:0] | 0x0 | Component identifier, bits[11:8] | ||
| ComponentID0 | 0xFF0 | [31:8] | - | Unused, read undefined |
| [7:0] | 0x0D | Component identifier, bits[7:0] |