CoreSight™ ETM9™ Technical Reference Manual

Revision: r0p1


Table of Contents

Preface
About this manual
Product revision status
Intended audience
Using this manual
Conventions
Further reading
Feedback
Feedback on the product
Feedback on this book
1. Introduction
1.1. About CoreSight ETM9
1.2. CoreSight ETM9 configuration
1.3. Product revisions
2. Implementation-defined Behavior
2.1. ETM architecture version
2.2. CoreSight ETM9 registers summary
2.3. CoreSight ETM9 register descriptions
2.3.1. ETM ID Register
2.3.2. Configuration Code Register
2.3.3. Configuration Code Extension Register
2.3.4. Peripheral Identification Registers
2.3.5. Component Identification Registers
2.3.6. Integration Test Registers
2.4. Precise TraceEnable events
2.5. Context ID tracing
2.6. ETM9CSSingle clocks
2.6.1. ETM9CSSingle clock signals
2.6.2. ETM9CSSingle clock enable signals
2.7. ETM9CSSingle resets
2.8. ETM9CS clocks
2.8.1. ETM9CS clock signals
2.8.2. ETM9CS clock enable signals
2.9. ETM9CS resets
2.10. PORTMODE, PORTSIZE, and MAXPORTSIZE
2.10.1. PORTMODE and PORTSIZE in ETM9CS
2.10.2. PORTMODE and PORTSIZE in ETM9CSSingle
2.10.3. MAXPORTSIZE in ETM9CS and ETM9CSSingle
2.11. Data instructions in Java state
2.12. Restrictions and limitations
3. Programmer’s Model
3.1. About the programmer’s model
3.2. Programming and reading ETM registers
3.2.1. Software access using APB
3.2.2. JTAG access through ETMJTAGPORT (JTAG-APB bridge) in ETM9CSSingle
4. Blocks for Stand-alone CoreSight ETM9
4.1. About additional blocks for stand-alone CoreSight ETM9
4.1.1. ETMJTAGPORT
4.1.2. JTAG synchronization
4.1.3. Programmer’s model for stand-alone systems
4.1.4. ETMTRACEPORT
A. Signals Lists
A.1. ETM9CSSingle Signals
A.2. ETM9CS Signals
B. I/O Signal Timings
B.1. ETM9CSSingle I/O timing parameters
B.2. ETM9CS I/O timing parameters
Glossary

Proprietary Notice

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Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.

The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

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Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision A23 March 2005First release
Revision B14 June 2007New issue for r0p1 release. Appendix C Typical APB Transfers removed. Further minor updates and corrections throughout document
Copyright © 2005, 2007 ARM Limited. All rights reserved.ARM DDI 0315B
Non-Confidential