2.1. About the Debug Port
The debug port is the host tools interface to access the DAP-Lite.
This interface controls any access ports provided within the DAP-Lite.
The DAP-Lite supports a combined debug port which includes both
JTAG and Serial Wire Debug (SWD), with a mechanism that
supports switching between them:
The
JTAG-DP is based on the IEEE 1149.1 Test Access Port (TAP)
and Boundary Scan Architecture, widely referred to as JTAG, and
provides a JTAG interface to the DAP. For more information, see JTAG-DP,
The SW-DP provides a two-pin (clock + data) interface
to the DAP-Lite. For more information, see SW-DP.
The SWJ-DP provides the auto-detect logic that selects between
JTAG and SWD. This enables the JTAG-DP and SW-DP to share the same
pins. For more information, see SWJ-DP.
Note
Only one debug port can be used at once, and switching between
the two debug ports must only be performed when neither debug port
is in use.
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