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| Home > Introduction > HTM functional description > External trace disabling | |||
You can disable AHB trace temporarily without affecting the contents of the FIFO, using the HTMTRACEDISABLE external pin. You can disable AHB trace by:
Setting the HTMTRACEDISABLE external pin in the HTM Control Register, HTMCONTROL. This can only be done when bit [6], EXTDISABLE, is HIGH.
Setting the SWTRACEDISABLE bit in the HTM Control Register.
Unlike setting the PROG bit in the HTM Control Register, using the external trace disable or SWTRACEDISABLE does not affect the operation of the resources such as the counter and sequencer.
In single-core systems, the HTMTRACEDISABLE input signal can be connected to the DBACK output of the ARM processor. However, because DBACK is not closely coupled to AHB transfers, the switching of DBACK might not be an accurate indication of whether the current AHB transfer is generated by a debug process. If possible, instead of using DBACK for trace filtering, debug software must use the software disable function, the SWTRACEDISABLE bit, in the HTM Control Register to filter out accesses in debug mode.
For multi-core systems, the designer of the SoC must ensure the correct DBACK is used if trace must be disabled during debug mode. It is up to the designer of the SoC to determine how the correct DBACK is routed to the HTM. In some situations, for example, in a multi-layer AHB system with an HTM connected to an AHB slave at the output port of an AHB bus matrix, it might not be possible to determine which DBACK must be used. In this case the use of DBACK for trace disabling is not recommended.