6.1. HTM test harness overview

The additional logic for functional verification and production testing enables:

The integration vectors provide a way of verifying that the trace interface of the HTM is correctly wired into a system. This is done by separately testing four groups of signals:

APB signals

These are tested by register access tests, which can verify the connections of all the address and data bits.

AHB signals

These are tested by register access tests, which can verify the connections of all the address and data bits.

ATB signals

These are tested by an example AHB capture, which can verify the connections of all the data bits. Additional test logic is added for testing of flush interface connection.

Intra-chip signals

The tests for these signals are system-specific, and enable you to write the necessary tests. Additional logic is implemented enabling you to read and write to each intra-chip input/output signal.

Table 6.1 shows the test methods for the HTM signal groups.

Table 6.1. Test method for HTM signal connections

Signal groupSignalsTest method
APB busPCLK, PCLKENDBG, PRESETDBGn, PSELDBG, PADDRDBG, PENABLEDBG, PWRITEDBG, PWDATADBG, PRDATADBG, PREADYDBG, PSLVERRDBUGAPB register access test.
AHB busHCLK, HRESETn, HTMHRESETn HADDR, HWRITE, HTRANS, HSIZE, HBURST, HPROT, HMASTER, HDOMAIN, HMASTLOCK, HUNALIGN, HBSTRB, HRDATAL, HRDATAH, HWDATAH, HWDATAH, HRESP, HREADY, HSELExample AHB capture.
ATB busATCLK, ATCLKEN, ATRESETn Example AHB capture.
ATVALIDM, ATREADYM, ATDATAM, ATBYTESM, AFREADYM, AFVALIDM, ATIDMExample AHB capture and integration test registers.
Intra-ChipHTMSYNCBYPASSRead from HTMSTATUS Register.
HTMMAXBUSRead from HTMCFGCODE2 Register.
HTMBUSSELECTOutput only. Test depends on SoC implementation.
HTMASICCTRLOutput only. Test depends on SoC implementation.
HTMTRIGGER, HTMTRIGOUTACKIntegration test registers.
HTMEXTINIntegration test registers.
HTMEXTOUTOutput only. Test depends on SoC implementation.
HTMSPNIDEN, HTMNIDEN, HTMDBGEN, HTMSPIDENRead only. For security reasons these signals must not be changed by integration logic.
HTMTRACEDISABLEIntegration test registers.

Test registers control these test features. This enables you to test the trace interface of the HTM in isolation from the rest of the system using only transfers from the AHB

A global register called HTMITCR must be activated before any integration tests can be performed. The HTMITCR register contains the ITEN bit, which is set to 1 during integration testing.

Figure 6.1 shows the integration logic.

Figure 6.1. Integration logic

Integration logic
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