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Table 4.2 lists the HTM header encodings.
Table 4.2. HTM header encodings summary
| Type | Bit 7 | Bits 6-5 | Bits 4-3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|
| A-sync | 0 | 00 | 000 | 0 | 0 | |
| Trigger | 0 | 01 | 00 | 0 | 0 | 0 |
| SEQ addr | 0 | 11 | 00 | 0 | 0 | 0 |
| Ignore | 0 | 00 | 01 | 0 | 0 | 0 |
| Trace off | 0 | 01 | 01 | 0 | 0 | 0 |
| Data suppressed | 0 | 10 | 01 | 0 | 0 | 0 |
| FIFO overflow | 0 | 11 | 01 | 0 | 0 | 0 |
| AHB reset on | 0 | 00 | 10 | 0 | 0 | 0 |
| AHB reset off | 0 | 01 | 10 | 0 | 0 | 0 |
| Reserved | X | 10/11 | 10 | 0 | 0 | 0 |
| Reserved | X | XX | 11 | 0 | 0 | 0 |
| Cycle count | Cont | Count[3:0] | 1 | 0 | 0 | |
| Data | 0 | Length[2:0] | Resp[1:0] | 1 | 0 | |
| Address | Cont | HADDR[3:0] | HWr | 0 | 1 | |
| Auxiliary | Cont | HCTRL[4:0] | 1 | 1 | ||
| Copyright © 2004-2008 ARM Limited. All rights reserved. | ARM DDI 0328E |
| Non-Confidential | |
| PDF version | |
| Home > Protocol Details > ATB packet format > Header encoding summary |