3.2.7. Column width field, MBIR[4:3]

The column width field specifies the number of columns in each block of RAM in the array under test. The column address is always encoded in the least significant bits of the RAM address, so the number of columns determines the number of bits used. This information is important for the correct operation of certain MBIST operations, such as bit-line stress testing and writing a true physical checkerboard pattern to the array.

Table 3.10 shows the supported column widths along with the number of LSB address bits used for each and the MBIR encodings required to select them.

Table 3.10. Column width field encoding

Column width MBIR[4:3]Number of columnsNumber of address bits
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