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In addition to reads and writes, exclusive reads and writes are supported in accordance with the AMBA AXI Protocol Specification.
Successful exclusive accesses have an EXOKAY response. All other accesses, including exclusive fail accesses, receive an OKAY response.
Exclusive access monitors implement the exclusive access functionality. Each monitor can track a single exclusive access. The number of monitors is a configurable option.
If an exclusive write fails, the data mask for the write is forced LOW, so that the data is not written.
When monitoring an exclusive access, the address of any write from another master is compared with the monitored address to check that the location is not being updated.
For the purposes of monitoring, address comparison is made using a bit mask derived in the following fashion.
Consider the byte addresses accessed by a transaction. All the least significant bits, up to and including, the most significant bit that vary between those addresses are set to logic zero in the mask. All the stable address bits above this point are set to logic one.
Example 2.1 provides information about three transactions.
Example 2.1.
Address = 0x100, size = WORD,
length = 1, ID = 0.
Address = 0x104,
size = WORD, length = 2, ID = 1.
Address
= 0x100, size = WORD, length = 1, ID = 0.
The write transaction accesses the address range 0x104-0x10B.
Therefore, address bit 3 is the most significant bit that varies
between byte addresses. The bit mask is therefore formed so that
address bits 3 down to 0 are not compared. This has the effect that
the masked write, as far as the monitoring logic has calculated,
has accessed the monitored address. Therefore the exclusive write
is marked as having failed.
Table 2.1 lists the address comparison steps:
Table 2.1. Address comparison steps example
| Step | Binary | Hex | |
|---|---|---|---|
| 1 | Monitored address | b000100000000 | 0x100 |
| 2 | Write address | b000100000100 | 0x104 |
| 3 | Write accesses | b000100000100 | 0x104 |
| b000100000101 | 0x105 | ||
| b000100000110 | 0x106 | ||
| b000100000111 | 0x107 | ||
| b000100001000 | 0x108 | ||
| b000100001001 | 0x109 | ||
| b000100001010 | 0x10A | ||
| b000100001011 | 0x10B | ||
| 4 | Generate a comparison mask | b111111110000 | 0xFF0 |
| 5 | Monitored address ANDed with mask | b000100000000 | 0x100 |
| 6 | Write Address ANDed with mask | b000100000000 | 0x100 |
| 7 | Compare steps 5 and 6 | ||
| 8 | Mark exclusive write as failed |
This example shows how the logic can introduce false-negatives in exclusive access monitoring, because in reality the write has not accessed the monitored address. The implementation has been chosen to reduce design complexity, but always provides safe behavior.
When calculating the address region accessed by the write,
the burst type is always taken to be INCR. Therefore, a wrapped
transaction in Example 2.1 that wraps
down to 0x0 rather than cross the boundary, is
treated in the same way. This is the same for a fixed burst that
does not cross the boundary or wrap down to 0x0.