AMBA DDR, LPDDR, and SDR Dynamic Memory Controller DMC-340 Technical Reference ManualRevision: r4p0
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2.1.3. APB slave interface

The APB slave interface provides access to the internal registers of the DMC. Figure 2.4 shows the APB interface external connections.

Figure 2.4. APB signals


Note

The pslverr output is included for completeness, and the DMC permanently drives it LOW.

For more information, see APB slave interface.

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