ARM1176JZ-S Technical Reference Manual: 3.2.12. c1, Non-Secure Access Control Register

The purpose of the Non-Secure Access Control Register is to define the Non-secure access permission for:

This register has no effect on Non-secure access permissions for the debug control coprocessor, CP14, or the system control coprocessor, CP15.

The Non-Secure Access Control Register is:

in CP15 c1
a 32 bit register:
- read/write in the Secure world
- read only in the Non-secure world
only accessible in privileged modes.

Figure 3.31 shows the arrangement of bits in the register.

Figure 3.31. Non-Secure Access Control Register format

Table 3.51 lists how the bit values correspond with the Non-Secure Access Control Register functions.

Table 3.51. Non-Secure Access Control Register bit functions

Bits	Field name	Function
[31:19]	-	Reserved. UNP/SBZ.
[18]	DMA	Reserves the DMA channels and registers for the Secure world and determines the page tables, Secure or Non-secure, to use for DMA transfers. For details, see DMA: 0 = DMA reserved for the Secure world only and the Secure page tables are used for DMA transfers, reset value 1 = DMA can be used by the Non-secure world and the Non-secure page tables are used for DMA transfers.
[17]	TL	Prevents operations in the Non-secure world from locking page tables in TLB lockdown entries. The Invalidate Single Entry or Invalidate ASID match operations can match a TLB lockdown entry but an Invalidate All operation only applies to unlocked entries: 0 = Reserve TLB Lockdown registers for Secure operation only, reset value 1 = TLB Lockdown registers available for Secure and Non-secure operation.
[16]	CL	Prevents operations in the Non-secure world from changing cache lockdown entries: 0 = Reserve cache lockdown registers for Secure operation only, reset value 1 = Cache lockdown registers available for Secure and Non-secure operation.
[15:14]	-	Reserved. UNP/SBZ.
[13:0]	CPn^[a]	Determines permission to access the given coprocessor in the Non-secure world: 0 = Secure access only, reset value 1 = Secure or Non-secure access.
^[a]n is the coprocessor number from 0 to 13.

To use the Non-Secure Access Control Register read or write CP15 with:

For example:

MRC p15, 0, <Rd>, c1, c1, 2    ; Read Non-Secure Access Control Register data

MCR p15, 0, <Rd>, c1, c1, 2    ; Write Non-Secure Access Control Register data

Table 3.52 lists the results of attempted access for each mode.

Table 3.52. Results of access to the Auxiliary Control Register

Secure Privileged		Non-secure Privileged		User
Read	Write	Read	Write	User
Data	Data	Data	Undefined exception	Undefined exception

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