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The purpose of the Context ID Register is to provide information on the current ASID and process ID, for example for the ETM and debug logic.
Table 3.129 lists the purposes of the individual bits of the Context ID Register.
Debug logic uses the ASID information to enable process-dependent breakpoints and watchpoints.
The Context ID Register is:
in CP15 c13
a 32-bit read/write register banked for Secure and Non-secure worlds
accessible in privileged modes only.
Writing to this register globally flushes the BTAC.
Figure 3.70 shows the arrangement of bits in the Context ID Register.
Table 3.129 lists how the bit values correspond with the Context ID Register functions.
Table 3.129. Context ID Register bit functions
| Bits | Field name | Function |
|---|---|---|
| [31:8] | PROCID | Extends the ASID to form the process ID and identify the current process. The value is the Process ID. The reset value is 0. |
| [8:0] | ASID | Holds the ASID of the current process to identify the current ASID. The value is the ASID. The reset value is 0. |
Table 3.130 lists the results of attempted access for each mode.
Table 3.130. Results of access to the Context ID Register
| Secure Privileged | Non-secure Privileged | User | ||
|---|---|---|---|---|
| Read | Write | Read | Write | |
| Secure data | Secure data | Non-secure data | Non-secure data | Undefined exception |
The current ASID value in the ID Context Register is exported to the MMU.
To use the Context ID Register read or write CP15 with:
Opcode_1 set to 0
CRn set to c13
CRm set to c0
Opcode_2 set to 1.
For example:
MRC p15, 0, <Rd>, c13, c0, 1 ;Read Context ID Register
MCR p15, 0, <Rd>, c13, c0, 1 ;Write Context ID Register
You must ensure that software performs a Data Synchronization Barrier operation before changes to this register. This ensures that all accesses are related to the correct context ID.
You must execute an IMB instruction immediately after changes to the Context ID Register. You must not attempt to execute any instructions that are from an ASID-dependent memory region between the change to the register and the IMB instruction. Code that updates the ASID must execute from a global memory region.
You must program each process with a unique number to ensure that ETM and debug logic can correctly distinguish between processes.