ARM1176JZ-S Technical Reference Manual: 3.2.49. c15, Peripheral Port Memory Remap Register

3.2.49. c15, Peripheral Port Memory Remap Register

The purpose of the Peripheral Port Memory Remap Register is to remap the memory attributes to Non-Shared Device. This forces access to the peripheral port and overrides what is programmed in the page tables. The remapping happens both with the MMU enabled and with the MMU disabled, therefore you can remap the peripheral port even when you do not use the MMU. The Peripheral Port Memory Remap Register has the highest priority, higher than that of the Primary and Normal memory remap registers.

Table 3.132 lists the purposes of the individual bits in the Peripheral Port Memory Remap Register.

The Peripheral Port Memory Remap Register is:

in CP15 c15
a 32-bit read/write register banked for Secure and Non-secure worlds
accessible in privileged modes only.

Figure 3.71 shows the arrangement of the bits in the register.

Figure 3.71. Peripheral Port Memory Remap Register format

Table 3.132 lists how the bit values correspond with the functions of the Peripheral Port Memory Remap Register.

Table 3.132. Peripheral Port Memory Remap Register bit functions

Bits	Field name	Function
[31:12]	Base Address	Gives the physical base address of the region of memory for remapping to the peripheral port. If the processor uses the Peripheral Port Memory Remap Register while the MMU is disabled, the virtual base address is equal to the physical base address that is used. The assumption is that the Base Address is aligned to the size of the remapped region. Any bits in the range [(log₂(Region size)-1):12] are ignored. The value is the base address. The reset value is 0.
[11:5]	-	UNP/SBZ
[4:0]	Size	Indicates the size of the memory region that the peripheral port is remapped to. All other values are reserved: b00000 = 0KB^[a] b00011 = 4KB b00100 = 8KB b00101 = 16KB b00110 = 32KB b00111 = 64KB b01000 = 128KB b01001 = 256KB b01010 = 512KB b01011 = 1MB b01100 = 2MB b01101 = 4MB b01110 = 8MB b01111 = 16MB b10000 = 32MB b10001 = 64MB b10010 = 128MB b10011 = 256MB b10100 = 512MB b10101 = 1GB b10110 = 2GB.
^[a]The reset value, indicating that no remapping is to take place.

Attempts to write to this register in Secure Privileged mode when CP15SDISABLE is HIGH result in an Undefined exception, see TrustZone write access disable.

Table 3.133 lists the results of attempted access for each mode.

Table 3.133. Results of access to the Peripheral Port Remap Register

Secure Privileged		Non-secure Privileged		User
Read	Write	Read	Write	User
Secure data	Secure data	Non-secure data	Non-secure data	Undefined exception

To use the memory remap registers read or write CP15 with:

Opcode_1 set to 0
CRn set to c15
CRm set to c2
Opcode_2 set to 4.

For example:

MRC p15, 0, <Rd>, c15, c2, 4    ; Read Peripheral Port Memory Remap Register

MCR p15, 0, <Rd>, c15, c2, 4    ; Write Peripheral Port Memory Remap Register

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