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The purpose of the DMA Internal Start Address Register for each channel is to define the first address in the TCM for that channel. That is, it defines the first address that data transfers go to or from.
The DMA Internal Start Address Register is:
in CP15 c11
one 32-bit read/write register for each DMA channel common to Secure and Non-secure worlds
accessible in user and privileged modes.
The DMA Internal Start Address Register bits [31:0] contain the Internal Start VA.
Access in the Non-secure world depends on the DMA bit, see c1, Non-Secure Access Control Register. The processor can access this register in User mode if the U bit, see c11, DMA User Accessibility Register, for the currently selected channel is set to 1. Table 3.114 lists the results of attempted access for each mode.
Table 3.114. Results of access to the DMA Internal Start Address Register
| U bit | DMA bit | Secure Privileged Read or Write | Non-secure Privileged Read or Write | Secure User Read or Write | Non-secure User Read or Write |
|---|---|---|---|---|---|
| 0 | 0 | Data | Undefined exception | Undefined exception | Undefined exception |
| 1 | Data | Data | Undefined exception | Undefined exception | |
| 1 | 0 | Data | Undefined exception | Data | Undefined exception |
| 1 | Data | Data | Data | Data |
To access the DMA Internal Start Address Register set the DMA Channel Number Register to the appropriate DMA channel and read or write CP15 c11 with:
Opcode_1 set to 0
CRn set to c11
CRm set to c5
Opcode_2 set to 0.
For example:
MRC p15, 0, <Rd>, c11, c5, 0 ; Read DMA Internal Start Address Register
MCR p15, 0, <Rd>, c11, c5, 0 ; Write DMA Internal Start Address Register
The Internal Start Address is a VA. Page tables describe the physical mapping of the VA when the channel starts.
The memory attributes for that VA are used in the transfer, so memory permission faults might be generated. The Internal Start Address must lie within a TCM, otherwise an error is reported in the DMA Channel Status Register. The marking of memory locations in the TCM as being Device results in Unpredictable effects. The global system behavior, but not the security, can be affected.
The contents of this register do not change while the DMA channel is Running. When the channel is stopped because of a Stop command, or an error, it contains the address required to restart the transaction. On completion, it contains the address equal to the Internal End Address.
The Internal Start Address must be aligned to the transaction size set in the DMA Control Register or the processor generates a bad parameter error.