16.2. CPU ETM interface port descriptions

The processor has a port that enables the ETM to determine the instruction execution sequence. These port descriptions are described in Table 16.1.

Table 16.1. ETM interface ports

Port nameDirectionQualified byDescription
ETMIVALIDOutputNo qualifierInstruction in execute is valid. Marks that an opcode has entered the first cycle of execute.
ETMIBRANCHOutputETMIVALIDOpcode is a branch target. Marks that current code is the destination of a Program Counter (PC) modifying event (branch, interrupt processing).
ETMIINDBROutputETMIBRANCHOpcode branch target is indirect. Marks that the current opcode is a branch target whose destination the PC contents cannot deduce. For example, LSU, register move, or interrupt processing.
ETMDVALIDOutputNo qualifierSignals that the current data address as seen by the Data Watchpoint and Trace (DWT) is valid on this cycle.
ETMICCFAILOutputETMIVALIDOpcode condition code fail or pass. Marks if the current opcode has failed or passed its conditional execution check. An opcode is conditionally executed if it is a conditional branch, or for all other opcode found in an IT block.
ETMINTSTAT[2:0]OutputNo qualifier

Interrupt status. Marks the interrupt status of the current cycle:

000 no status

001 interrupt entry

010 interrupt exit

011 interrupt return

100 - Vector fetch and stack push. ETMINTSTAT Entry/Return is asserted in the first cycle of the new interrupt context. Exit occurs without ETMIVALID.

ETMINTNUM[8:0]OutputETMINTSTATInterrupt number. Marks the interrupt number of the current execution context.
ETMIA[31:1]OutputNo qualifier

Instruction address. Indicates the current fetch address of the opcode in execution, or of the last opcode executed. You can determine the context by examining:

ETMIVALID

HALTED

SLEEPING.

The ETM examines this net when ETMIVALID is asserted. The DWT examines this net for PC samples and bus watching.

ETMFOLDOutputETMIVALIDOpcode fold. Indicates that an IT opcode has been folded in this cycle. PC advances past the current (16-bit) opcode and the IT instruction (16 bits). This affects the ETMIA.
ETMFLUSHOutputNo qualifierFlush marker of PC event. A PC modifying opcode has executed or an interrupt push/pop has started. The ETM can use this control to complete outstanding packets in preparation for an ETMIBRANCH event.
ETMFINDBROutputETMFLUSHFlush is indirect. Marks that the PC cannot deduce the flush hint destination.
ETMCANCELOutputNo qualifier

Current opcode in execute has been cancelled. Opcodes that are interrupted restart or continue on return to this execution context. These include:

LDR/STR

LDRD/STRD

LDM/STM

U/SMULL

MLA

U/SDIV

MSR

CPSID

ETMISTALLOutputNo qualifierIndicates that the last instruction signalled by the core has not yet entered execute. If ETMICANCEL is asserted with ETMISTALL, it indicates that the stalled instruction did not execute, and the previous instruction was cancelled.
ETMTRIGGER[3:0]OutputNo qualifierOutput trigger from DWT. One bit for each of the four DWT comparators.
ETMTRIGINOTD[3:0]OutputNo qualifierOutput indicates if the ETM is triggered on an instruction or data match.
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