A.10. AHB-AP interface

Table A.10 lists the signals of the AHB-AP interface.

Table A.10. AHB-AP interface

NameDirectionDescription
DAPRDATA[31:0]OutputThe read bus is driven by the selected AHB-AP during read cycles when DAPWRITE is LOW.
DAPREADYOutputThe AHB-AP uses this signal to extend a DAP transfer.
DAPSLVERROutput

The error response is because of:

  • Master port produced an error response, or transfer not initiated because of DAPEN preventing a transfer.

  • Access to AP register not accepted after a DAPABORT operation.

DAPCLKENInputDAP clock enable (power saving).
DAPENInputAHB-AP enable.
DAPADDR[31:0]InputDAP address bus.
DAPSELInputSelect signal generated from the DAP decoder to each AP. This signal indicates that the slave device is selected, and a data transfer is required. There is a DAPSEL signal for each slave. The signal is not generated by the driving DP. The decoder monitors the address bus and asserts the relevant DAPSEL.
DAPENABLEInputThis signal indicates the second and subsequent cycles of a DAP transfer from DP to AHB-AP.
DAPWRITEInputWhen HIGH indicates a DAP write access from DP to AHB-AP. When LOW indicates a read access.
DAPWDATA[31:0]InputThe write bus is driven by the DP block during write cycles when DAPWRITE is HIGH.
DAPABORTInputAborts the current transfer. The AHB-AP returns DAPREADY HIGH without affecting the state of the transfer in progress in the AHB Master Port.
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