13.1. About the TPIU

The TPIU acts as a bridge between the on-chip trace data from the Embedded Trace Macrocell (ETM) and the Instrumentation Trace Macrocell (ITM), with separate IDs, to a data stream, encapsulating IDs where required, that is then captured by a Trace Port Analyzer (TPA).

The TPIU is specially designed for low-cost debug. It is a special version of the CoreSight TPIU, and you can replace it with CoreSight components if system requirements demand the additional features of the CoreSight TPIU.

There are two configurations of the TPIU:

Note

If your Cortex-M3 system uses the optional ETM component, you must use the TPIU configuration that supports both ITM and ETM debug trace. For a full description of the ETM, see Chapter 15 Embedded Trace Macrocell.

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