5.2. Exception types

Various types of exceptions exist in the processor. A fault is an exception that results from an error condition because of instruction execution. Faults can be reported synchronously or asynchronously to the instruction that caused them. In general, faults are reported synchronously. The Imprecise Bus Fault is an asynchronous fault supported in the ARMv7-M profile. A synchronous fault is always reported with the instruction that caused the fault. An asynchronous fault does not guarantee how it is reported with respect to the instruction that caused the fault.

For more information on exceptions, see the ARMv7-M Architecture Reference Manual.

Table 5.1 shows the exception type, position, and priority. Position refers to the word offset from the start of the vector table. The lower numbers shown in the Priority column of the table are higher priority. How the types are activated, synchronously or asynchronously, is also shown. The exact meaning and use of priorities is explained in Exception priority.

Table 5.1. Exception types

Exception typePositionPriorityDescription
-0-Stack top is loaded from first entry of vector table on reset.
Reset1–3 (highest)Invoked on power up and warm reset. On first instruction, drops to lowest priority (Thread mode). This is asynchronous.
Non-maskable Interrupt2–2Cannot be stopped or pre-empted by any exception but reset. This is asynchronous.
Hard Fault3–1All classes of Fault, when the fault cannot activate because of priority or the Configurable Fault handler has been disabled. This is synchronous.
Memory Management4Configurable[1]Memory Protection Unit (MPU) mismatch, including access violation and no match. This is synchronous. This is used even if the MPU is disabled or not present, to support the Executable Never (XN) regions of the default memory map.
Bus Fault5Configurable[2]Pre-fetch fault, memory access fault, and other address/memory related. This is synchronous when precise and asynchronous when imprecise.
Usage Fault6ConfigurableUsage fault, such as Undefined instruction executed or illegal state transition attempt. This is synchronous.
-7-10-Reserved
SVCall11ConfigurableSystem service call with SVC instruction. This is synchronous.
Debug Monitor12ConfigurableDebug monitor, when not halting. This is synchronous, but only active when enabled. It does not activate if lower priority than the current activation.
-13-Reserved
PendSV14ConfigurablePendable request for system service. This is asynchronous and only pended by software.
SysTick15ConfigurableSystem tick timer has fired. This is asynchronous.
External Interrupt16 and aboveConfigurableAsserted from outside the core, INTISR[239:0], and fed through the NVIC (prioritized). These are all asynchronous.

[1] You can change the priority of this exception. See Figure 8.13. Settable is an NVIC priority value of 0 to N, where N is the largest priority value implemented. Internally, the highest user-settable priority (0) is treated as 4.

[2] You can enable or disable this fault. See Figure 8.14.

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