15.3. ETM resources

Because the ETM does not generate data trace information, the lower bandwidth reduces the requirement for complex triggering capabilities. This means that the ETM does not include the following:

Table 15.7 lists the Cortex-M3 resources.

Table 15.7. Cortex-M3 resources

FeaturePresent on Cortex-M3 ETM
Architecture versionETMv3.4
Address comparator pairs0
Data comparators0
Context ID comparators0
MMDs0
Counters0
SequencerNo
Start/stop blockYes
Embedded ICE comparators4
External inputs2
External outputs0
Extended external inputs0
Extended external input selectors0
FIFOFULLYes
FIFOFULL level settingYes
Branch broadcastingYes
ASIC Control RegisterNo
Data suppressionNo
Software access to registersYes
Readable registersYes
FIFO size24 bytes
Minimum port size8 bytes
Maximum port size8 bytes
Normal port mode-
Normal half-rate clocking/1:1Yes - asynchronous
Demux port mode-
Demux half-rate clocking/1:2No
Mux port mode/2:1No
1:4 port modeNo
Dynamic port mode (including stalling)No. Supported by asynchronous port mode.
CPRT dataNo
Load PC firstNo
Fetch comparisonsNo
Load data tracedNo
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