5.3.2. Priority grouping

To increase priority control in systems with large numbers of interrupts, the NVIC supports priority grouping. You can use the PRIGROUP field in the Application Interrupt and Reset Control Register to split the value in every PRI_N field into a pre-emption priority field and a subpriority field. The pre-emption priority group is referred to as the group priority. Where multiple pending exceptions share the same group priority, the sub-priority bit field resolves the priority within a group. This is referred to as the sub-priority within the group. The combination of the group priority and the sub-priority is referred to generally as the priority. Where two pending exceptions have the same priority, the lower pending exception number has priority over the higher pending exception number. This is consistent with the priority precedence scheme.

Table 5.3 shows how writing to PRIGROUP splits an eight bit PRI_N field into a pre-emption priority field (x) and a subpriority field (y).

Table 5.3. Priority grouping

 Interrupt priority level field, PRI_N[7:0]
PRIGROUP[2:0] Binary point position Pre-emption field Subpriority field Number of pre-emption priorities Number of subpriorities


  • Table 5.3 shows the priorities for the processor configured with eight bits of priority.

  • For a processor configured with less than eight bits of priority, the lower bits of the register are always 0. For example, if four bits of priority are implemented, PRI_N[7:4] sets the priority, and PRI_N[3:0] is 4'b0000.

An interrupt can pre-empt another interrupt in progress only if its pre-emption priority is higher than that of the interrupt in progress.

For more information on priority optimizations, priority level grouping, and priority masking, see the ARMv7-M Architecture Reference Manual.

Copyright © 2005, 2006 ARM Limited. All rights reserved.ARM DDI 0337E