5.9.2. Intended boot-up sequence

A normal reset routine follows the steps shown in Table 5.8. A C/C++ runtime can perform the first three steps and then call main().

Table 5.8. Reset boot-up behavior

ActionDescription
Initialize variablesAny global/static variables must be setup. This includes initializing the BSS variable to 0, and copying initial values from ROM to RAM for non-constant variables.
[Setup stacks]If more than one stack is be used, the other banked SPs must be initialized. The current SP can also be changed to Process from Main.
Initialize any runtimeOptionally make calls to C/C++ runtime init code to enable use of heap, floating point, or other features. This is normally done by __main from the C/C++ library.
[Initialize any peripherals]Setup peripherals before interrupts are enabled. This can call to setup each peripheral to be used in the application.
[Switch ISR vector table]Optionally change vector table from Code area, @0, to a location in SRAM. This is only done to optimize performance or enable dynamic changes.
[Setup Configurable Faults]Enable Configurable faults and set their priorities.
Setup interruptsSetup priority levels and masks.
Enable interruptsEnable interrupts. Enable the interrupt processing in the NVIC. It is not desirable to have these occur as they are being enabled. If there are more than 32 interrupts, it takes more than one Set-Enable Register. PRIMASK can be used through CPS or MSR to mask interrupts until ready.
[Change Privilege][Change Privilege]. The Thread mode privilege can be changed to user if required. This must normally be handled by invoking the SVCall handler.
LoopIf sleep-on-exit is enabled, control never returns after the first interrupt/exception is taken. If sleep-on-exit is selectively enabled/disabled, this loop can manage cleanup and executive tasks. If sleep-on-exit is not used, the loop is free and can use WFI (sleep-now) when required.

Note

Entries in Table 5.8 that are bracketed are optional actions.

Example of reset routine

The reset routine is responsible for starting up the application and then enabling interrupts. There are three methods for involving the reset ISR after interrupt processing is performed. This is called the main loop part of the Reset ISR and the three examples are shown in Example 5.1, Example 5.2, and Example 5.3.

Example 5.1. Reset routine with pure sleep on exit (Reset routine does no main loop work)

void reset()
{ 
	// do setup work (initialize variables, initialize runtime if wanted,
	setup 	peripherals, etc)
	nvic[INT_ENA] = 1;    // enable interrupts
	nvic_regs[NV_SLEEP] |= NVSLEEP_ON_EXIT; // will not normally come back after 
											 1st exception
	while (1) 
	wfi();
}

Example 5.2. Reset routine with selected Sleep model using WFI

void reset()
{ 
	extern volatile unsigned exc_req;
	// do setup work (initialize variables, initialize runtime if wanted,
	setup 	peripherals, etc)
	nvic[INT_ENA] = 1;    // enable interrupts
	while (1)
	{
		// do some work for (exc_req = FALSE; exc_req == FALSE; )
		wfi();		// sleep now - wait for interrupt
	// do some post exception checking/cleanup
	}
}

Example 5.3. Reset routine with selected Sleep on exit cancelled by ISRs that require attention

void reset()
{ 
	// do setup work (initialize variables, initialize runtime if wanted,
	setup 	peripherals, etc)
	nvic[INT_ENA] = 1;    // enable interrupts
	while (1)
	{
		// We are slept until an exception clears sleep on exit state so that we 
		can post-process/cleanup.
		nvic_regs[NV_SLEEP] |= NVSLEEP_ON_EXIT;
		while (nvic_regs[NV_SLEEP] & NVSLEEP_ON_EXIT)
		wfi();		// sleep now - wait for interrupt which clears
		// do some post exception checking/cleanup
	}
}

Note

An executive is not required in the Reset routine because an ISR activation can enact priority level changes. This ensures faster response to changing loads, and uses priority boosting, to solve priority inversions, to ensure fine grain support. Thread mode is used for the user code for Real Time Operating System (RTOS) models using threads and privilege.

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