10.1.1. Halt mode debugging

The debugger can halt the core by setting the C_DEBUGEN and C_HALT bits of the Debug Halting Control and Status Register. The core acknowledges when halted by setting the S_HALT bit of the Debug Halting Control and Status Register.

The core can be single stepped by halting the core, setting the C_STEP bit to 1, and then clearing the C_HALT bit to 0. The core acknowledges completion of the step and re-halt by setting the S_HALT bit of the Debug Halting Control and Status Register.

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