15.6.2. List of ETM registers

The ETM registers are listed in Table 15.9. For full details, see the ARM Embedded Trace Macrocell Architecture Specification.

Table 15.9. ETM registers

ETM ControlRead/write0xE0041000YesFor a description, see ETM Control Register.
Configuration CodeRead only0xE0041004YesFor a description, see Configuration Code Register.
Trigger eventWrite only0xE0041008YesDefines the event that controls the trigger.
ASIC Control-0xE004100CNo-
ETM StatusRead only or Read/write0xE0041010YesProvides information on the current status of the trace and trigger logic.
System ConfigurationRead only0xE0041014YesFor a description, see page System Configuration Register.
TraceEnable-0xE0041018, 0xE004101CNo-
TraceEnable EventWrite only0xE0041020YesDescribes the TraceEnable enabling event.
TraceEnable Control 1Write only0xE0041024YesFor a description, see TraceEnable Control 1 Register.
FIFOFULL RegionWrite only0xE0041028No-
FIFOFULL LevelWrite only or Read/write0xE004102CYesHolds the level below which the FIFO is considered full.
Address Comparators-0xE0041040- 0xE004113CNo-
Sequencer-0xE0041180-0xE0041194, 0xE0041198No-
External Outputs-0xE00411A0-0xE00411ACNo-
CID Comparators-0xE00411B0-0xE00411BCNo-
Implementation specific-0xE00411C0-0xE00411DCNoAll RAZ. Ignore writes.
Synchronization FrequencyRead only0xE00411E0YesReads as 0x00000400.
ETM IDRead only0xE00411E4YesFor a description, see ETM ID Register.
Configuration Code ExtensionRead only0xE00411E8YesFor a description, see Configuration Code Extension Register.
Extended External Input Selector-0xE00411ECNoNo extended external inputs implemented.
TraceEnable Start/Stop Embedded ICERead/write0xE00411F0YesBits [19:16] configure E-ICE inputs to use as stop resources. Bits [3:0] configure E-ICE inputs to use as start resources.
Embedded ICE Behavior Control-0xE00411F4NoEmbedded ICE inputs use the default behavior.
CoreSight Trace IDRead/write0xE0041200YesImplemented as normal.
OS Save/Restore-0xE0041304-0xE0041308NoOS Save/Restore not implemented. RAZ, ignore writes.
Power Down Status RegisterRead only0xE0041314YesFor a description, see Power Down Status Register.
ITMISCINRead only0xE0041EE0YesSets [1:0] to EXTIN[1:0], [4] to COREHALT.
ITTRIGOUTWrite only0xE0041EE8YesSets [0] to TRIGGER.
ITATBCTR2Read only0xE0041EF0YesSets [0] to ATREADY.
ITATBCTR0Write only0xE0041EF8YesSets [0] to ATVALID.
Integration Mode ControlRead/write0xE0041F00YesImplemented as normal.
Claim TagRead/write0xE0041FA0-0xE0041FA4YesImplements the 4-bit claim tag.
Lock AccessWrite only0xE0041FB0-0xE0041FB4YesImplemented as normal.
Authentication StatusRead only0xE0041FB8YesImplemented as normal.
Device TypeRead only0xE0041FCCYesReset value: 0x13.
Peripheral ID 4Read only0xE0041FD0Yes0x04
Peripheral ID 5Read only0xE0041FD4Yes0x00
Peripheral ID 6Read only0xE0041FD8Yes0x00
Peripheral ID 7Read only0xE0041FDCYes0x00
Peripheral ID 0Read only0xE0041FE0Yes0x24
Peripheral ID 1Read only0xE0041FE4Yes0xB9
Peripheral ID 2Read only0xE0041FE8Yes0x1B
Peripheral ID 3Read only0xE0041FECYes0x00
Component ID 0Read only0xE0041FF0Yes0x0D
Component ID 1Read only0xE0041FF4Yes0x90
Component ID 2Read only0xE0041FF8Yes0x05
Component ID 3Read only0xE0041FFCYes0xB1
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