Cortex-M3 Technical Reference Manual: 9.3.1. ITM Trace Privilege Register, ITM

The ITM_TPR characteristics are:

Purpose: Enables an operating system to control the stimulus ports that are accessible by user code.
Usage constraints: You can only write to this register in privileged mode.
Configurations: This register is available if the ITM is configured in your implementation.
Attributes: See Table 9.1.

Figure 9.1 shows the ITM_TPR bit assignments.

Figure 9.1. ITM_TPR bit assignments

Table 9.2 shows the ITM_TPR bit assignments.

Table 9.2. ITM_TPR bit assignments

Bits	Name	Function
[31:4]	-	Reserved.
[3:0]	PRIVMASK	Bit mask to enable tracing on ITM stimulus ports: bit [0] = stimulus ports [7:0] bit [1] = stimulus ports [15:8] bit [2] = stimulus ports [23:16] bit [3] = stimulus ports [31:24].

Bits

Name

Function

[31:4]

Reserved.

[3:0]

PRIVMASK

Bit mask to enable tracing on ITM stimulus ports:

bit [0] = stimulus ports [7:0]

bit [1] = stimulus ports [15:8]

bit [2] = stimulus ports [23:16]

bit [3] = stimulus ports [31:24].

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