Cortex-M3 Technical Reference Manual Revision r2p1
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11.3.10. TPIU_DEVID

The TPIU_DEVID characteristics are:

Purpose

Indicates the functions provided by the TPIU for use in topology detection.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all processor configurations.

Attributes

See Table 11.1.

Figure 11.11 shows the TPIU_DEVID bit assignments.

Figure 11.11. TPIU_DEVID bit assignments

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Table 11.11 shows the TPIU_DEVID bit assignments.

Table 11.11. TPIU_DEVID bit assignments

BitsNameFunction
[31:12]-Reserved
[11]Asynchronous Serial Wire Output (NRZ)This bit Reads-As-One (RAO), indicating that the output is supported.
[10]Asynchronous Serial Wire Output (Manchester)This bit Reads-As-One (RAO), indicating that the output is supported.
[9]Parallel trace port modeThis bit Reads-As-Zero (RAZ), indicating that parallel trace port mode is supported.
[8:6]Minimum buffer size

Specifies the minimum TPIU buffer size:

0b010 = 4 bytes.

[5]Asynchronous TRACECLKIN

Specifies whether TRACECLKIN can be asynchronous to CLK:

0b1 = TRACECLKIN can be asynchronous to CLK.

[4:0]Number of trace inputs

Specifies the number of trace inputs:

0b000000 = 1 input

0b000001 = 2 inputs

If your implementation includes an ETM, the value of this field is 0b00001.


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