10.3.4. Configuration Code Register, ETMCCR

The ETM Configuration Code Register characteristics are:

Purpose

Enables software to read the implementation-specific configuration of the ETM.

Usage constraints

There are no usage constraints.

Configurations

This register is only available if the processor is configured to use the ETM.

Attributes

See the ETM register summary in Table 10.6.

Figure 10.3 shows the ETMCCR bit assignments.

Figure 10.3. ETMCCR bit assignments

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Table 10.8 shows the ETMCCR bit assignments.

Table 10.8. ETMCCR bit assignments

Bits

Name

Function

[31]

ETM ID register present

The value of this bit is 1, indicating that the ETMIDR, register 0x79, is present and defines the ETM architecture version in use.

[30:28]

-

Reserved.

[27]

Coprocessor and memory access

The value of this bit is 1, indicating that memory-mapped access to registers is supported.

[26]

Trace start/stop block present

The value of this bit is 1, indicating that the Trace start/stop block is present.

[25:24]

Number of Context ID comparators

The value of these bits is 0b00, indicating that Context ID comparators are not implemented.

[23]

FIFOFULL logic present

The value of this bit is 1, indicating that FIFOFULL logic is present in the ETM. To use FIFOFULL the system must also support the function, as indicated by bit [8] of ETMSCR, see System Configuration Register, ETMSCR.

[22:20]

Number of external outputs

The value of these bits is 0b000, indicating that no external outputs are supported.

[19:17]

Number of external inputs

The value of these bits is between 0b000 and 0b010, indicating the number of external inputs, from 0 to 2, implemented in the system.

[16]

Sequencer present

The value of this bit is 0, indicating that the sequencer is not implemented.

[15:13]

Number of countersThe value of these bits is 0b001, indicating that one counter is implemented.

[12:8]

Number of memory map decoders

The value of these bits is 0b00000, indicating that memory map decoder inputs are not implemented.

[7:4]

Number of data value comparators

The value of these bits is 0b0000, indicating that data value comparators are not implemented.

[3:0]

Number of address comparator pairs

The value of these bits is 0b0000, indicating that address comparator pairs are not implemented.


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