Figure 10.1 shows a block diagram of the ETM, and shows how the ETM interfaces to the Trace Port Interface Unit (TPIU).

The Cortex-M3 system can perform low-bandwidth data tracing using the Data Watchpoint and Trace (DWT) and Instruction Trace Macrocell (ITM) components.

The ETM trace output is compatible with the AMBA Trace Bus (ATB) protocol, irrespective of the configuration of the trace port size and trace port mode within the ETM programmers model. The TPIU exports trace information from the processor. An implementation can replace the TPIU with other CoreSight trace components.

For more information see:

The ETM provides a trace ID register for systems that use multiple trace sources. You must configure this register even if only a single trace source is in use.

The following sections provide information on features of the ETM: