Cortex-M3 Technical Reference Manual Revision r2p1
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10.3.11. Integration Test Miscellaneous Inputs, ITMISCIN

The ITMISCIN characteristics are:

Purpose

Integration test.

Usage constraints

There are no usage constraints.

Configurations

This register is only available if the processor is configured to use the ETM.

Attributes

See the register summary in Table 10.6.

Figure 10.10 shows the ITMISCIN bit assignments.

Figure 10.10. ITMISCIN bit assignments

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Table 10.15 shows the ITMISCIN bit assignments.

Table 10.15. ITMISCIN bit assignments

BitsNameFunction
[31:5]-Reserved.
[4]COREHALTA read of this bit returns the value of the COREHALT input pin.
[3:2]-Reserved.
[1:0]EXTIN[1:0]A read of these bits returns the value of the EXTIN[1:0] input pins.

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