10.3.1. Modes of operation and execution

ETM-M3 implements ETMv3.5 for tracing 16-bit and 32-bit Thumb instructions. The Embedded Trace Macrocell Architecture Specification describes the features of ETMv3.5.

See Features for information on the trace features of the ETM-M3.

When the ETM is powered up or reset, you must program all of the registers that do not have an architected reset state before you enable tracing. If you do not do so, the trace results are Unpredictable.

When programming the ETM registers you must enable all the changes at the same time. To achieve this, the Programming bit in ETMCR should be used. See Main Control Register, ETMCR.

When the Programming bit is set to 0 you must not write to registers other than ETMCR, because this can lead to Unpredictable behavior.

When setting the Programming bit, you must not change any other bits of ETMCR. You must only change the value of bits other than the Programming bit of ETMCR when bit [1] of ETMSR is set to 1. ARM recommends that you use a read-modify-write procedure when changing ETMCR.

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