| Copyright © 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0338G |
| Non-Confidential | |
 PDF version | |
| Home > Coprocessor Interface > Token queues > Cancel queue |
| |||
| Home > Coprocessor Interface > Token queues > Cancel queue | |||
The core might want to cancel an instruction that it has already passed on to the coprocessor. This can happen if the instruction fails its condition codes, which requires the instruction to be removed from the instruction stream in both the core and the coprocessor.
The queue, which is a standard queue as described in Token queue management, is maintained by the coprocessor and is read by the coprocessor Ex1 stage.
The cancel queue provides an interface to the core through the following signals, which are all driven by the core:
This signal is asserted when valid data are available from the core. It must be clocked directly into the buffer A flag, unless the queue is full, in which case it is ignored.
This is the cancel command being passed to the coprocessor from the core, and must be clocked into buffer A.
This is the flush tag associated with the cancel command, and must be clocked into the tag associated with buffer A.
The cancel queue is read by the coprocessor Ex1 stage, which acts on the value of the queued ACPCANCEL signal by removing the instruction from the Ex1 stage if the signal is set, and not passing it on to the Ex2 stage.
| Copyright © 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0338G |
| Non-Confidential | |
| PDF version | |
| Home > Coprocessor Interface > Token queues > Cancel queue |