A.7. Coprocessor interface signals

Table A.10 show the coprocessor interface signals.

Table A.10. Coprocessor interface signals

NameDirectionDescription
ACPCANCELOutputAsserted to indicate the instruction is to be cancelled
ACPCANCELT[3:0]OutputTag for instruction cancelled by ACPCANCEL
ACPCANCELVOutputAsserted to indicate ACPCANCEL is valid
ACPENABLE[11:0]OutputCoprocessor enable
ACPFINISHVOutputFinish token
ACPFLUSHOutputInstruction flush
ACPFLUSHT[3:0]OutputTag for instruction flushed by ACPFLUSH
ACPINSTR[31:0]OutputInstruction bus
ACPINSTRT[3:0]OutputTag accompanying the instruction on ACPINSTR
ACPINSTRVOutputIndicates that the instruction on ACPINSTR is valid
ACPLDDATA[63:0]OutputLoad data to the coprocessor
ACPLDVALIDOutputIndicates that the data on ACPLDDATA is valid
ACPSTSTOPOutputAsserted to stop the coprocessor sending the core store data
ACPPRIVOutputIndicates that the core is in a privileged mode
CPAACCEPTInputBounce signal from coprocessors issue stage
CPAACCEPTHOLDInputCPAACCEPT is not valid when this signal is asserted
CPAACCEPTT[3:0]InputTag for instruction bounced by CPAACCEPT
CPALENGTH[3:0]InputTransfer length information from coprocessor
CPALENGTHHOLDInputCPALENGTH is not valid when this signal is asserted
CPALENGTHT[3:0]InputInstruction tag for CPALENGTH
CPAPRESENT[11:0]InputIndicates which coprocessors are present
CPASTDATA[63:0]InputCoprocessor store data
CPASTDATAT[3:0]InputTag accompanying the data on CPASTDATA
CPASTDATAVInputIndicates that the store data is valid

Note

If no coprocessor is connected, the following signals must be driven LOW:

  • CPALENGTHHOLD

  • CPAACCEPT

  • CPAACCEPTHOLD.

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