The lower bits of the address are used as the index for the tag and RAM blocks, including the TCM.

The physical addresses read from the Tag RAMs and the TCM base address register, and the Cache Write Buffer address registers, are compared with the physical address to form hit signals for each of the cache ways

The hit signals are used to select the data from the cache way that has a hit. Any bytes contained in both the data RAMs and the Cache Write Buffer entries are taken from the Cache Write Buffer. If two or three Cache Write Buffer entries are to the same bytes, the most recently written bytes are taken.

The lower bits of the address are used as the index for the tag blocks.

The physical addresses read from the Tag RAMs and the TCM base address register are compared with the physical address from the core to form hit signals for each of the cache ways.

If a cache way, or the TCM, has recorded a hit, then the write data is written to an entry in the Cache Write Buffer, along with the cache way, or TCM, that it must take place to.

The contents of the Cache Write Buffer are held until a subsequent write or CP15 operation requires space in the Write Buffer. At this point the oldest entry in the Cache Write Buffer is written into the cache.