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Integration Test Registers are provided to simplify the process of verifying the integration of the CTI with other devices in a CoreSight system. These registers enable direct control of outputs and the ability to read the value of inputs. You must only use these registers when the Integration Test Control Register bit [0] is set to 1.
See the CoreSight Implementation and Integration Manual for details of how to use these signals.
Table 15.17 shows the CTI Integration Test Registers.
Table 15.17. CTI Integration Test Registers
| Address offset | Register | Access | Width | Description |
|---|---|---|---|---|
0xEE0 | ITTRIGINACK | W | 9 bits | ITTRIGINACK, 0xEE0 |
0xEE4 | ITCHOUT | W | 4 bits | ITCHOUT, 0xEE4 |
0xEE8 | ITTRIGOUT | W | 9 bits | ITTRIGOUT, 0xEE8 |
0xEF0 | ITTRIGOUTACK | R | 9 bits | ITTRIGOUTACK, 0xEF0 |
0xEF4 | ITCHIN | R | 4 bits | ITCHIN, 0xEF4 |
0xEF8 | ITTRIGIN | R | 9 bits | ITTRIGIN, 0xEF8 |