2.4.3. Jazelle OS Control Register

The Jazelle OS Control Register enables operating systems to control access to Jazelle Extension hardware.

The Jazelle OS Control Register is:

in CP14 register c0
a 32-bit register, with access rights that depend on the current privilege:
- the result of an access in User mode is an Undefined Instruction exception
- the register is Read/Write (R/W) in Privileged modes.

Figure 2.6 shows the bit arrangement of the Jazelle OS Control Register.

Figure 2.6. Jazelle OS Control Register format

Table 2.6 shows how the bit values correspond with the Jazelle OS Control Register.

Table 2.6. Jazelle OS Control Register bit functions

Bits	Field	Function
[31:0]	-	RAZ

To access this register, read or write CP14 with:

MRC p14, 7, <Rd>, c1, c0, 0 ; Read OS Control Register

MCR p14, 7. <Rd>, c1, c0, 0 ; Write OS Control Register

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