IT[7:5] encodes the base condition code for the current IT block, if any. It contains b000 when no IT block is active.

IT[4:0] encodes the number of instructions that are to be conditionally executed, and whether the condition for each is the base condition code or the inverse of the base condition code. It contains b00000 when no IT block is active.

When the processor executes an IT instruction, it sets these bits according to the condition in the instruction, and the Then and Else (T and E) parameters in the instruction. During execution of an IT block, IT[4:0] is shifted:

See the ARM Architecture Reference Manual for more information on the operation of the IT execution state bits.