3.2.39. c6, Instruction Fault Address Register

The purpose of the Instruction Fault Address Register (IFAR) is to hold the address of instructions that cause a prefetch abort.

The IFAR is:

The Instruction Fault Address Register bits [31:1] contain the instruction fault MVA and bit [0] is RAZ.

Table 3.72 shows the results of attempted access for each mode.

Table 3.72. Results of access to the Instruction Fault Address Register[33]

Secure privilegedNonsecure privilegedSecure User Nonsecure User
ReadWriteReadWriteReadWriteReadWrite
Secure dataSecure dataNonsecure dataNonsecure dataUndefinedUndefinedUndefinedUndefined

[33] An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.


To access the IFAR, read or write CP15 with:

MRC p15, 0, <Rd>, c6, c0, 2 ; Read Instruction Fault Address Register
MCR p15, 0, <Rd>, c6, c0, 2 ; Write Instruction Fault Address Register

A write to this register sets the IFAR to the value of the data written. This is useful for a debugger to restore the value of the IFAR.

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