16.2.2. Data-processing instructions

Data-processing instructions are divided into the following subcategories:

Data-processing instructions with a destination

AND, EOR, SUB, RSB, ADD, ADC, SBC, RCSC, ORR, BIC

Data-processing without a destination

TST, TEQ, CMP, CMN

Move instructions

MOV, MVN

The data-processing instruction tables exclude cases where the PC is the destination. Branch instructions describes these cases.

Table 16.1 shows the operation of data-processing instructions that use a destination.

Table 16.1. Data-processing instructions with a destination

Shift typeCyclesSource1Source2Source3Source4Result1Result2
Immediate1Rn:E2[Rd:E2]--Rd:E2-
Register1Rn:E2Rm:E2[Rd:E2]-Rd:E2-
Shift by immediate, non-RRX1Rn:E2Rm:E1[Rd:E2]-Rd:E2-
Shift by immediate, RRX[1]1Rn:E2Rm:E1[Rd:E2]-Rd:E2-
Shift by register1Rn:E2Rm:E1Rs:E1[Rd:E2]Rd:E2-

[1] One-cycle stall required before instruction execution.


Table 16.2 shows the operation of data-processing instructions that do not use a destination.

Table 16.2. Data-processing instructions without a destination

Shift typeCyclesSource1Source2Source3Source4Result1Result2
Immediate1Rn:E2-----
Register1Rn:E2Rm:E2----
Shift by immediate, non-RRX1Rn:E2Rm:E1----
Shift by immediate, RRX[1]1Rn:E2Rm:E1----
Shift by register1Rn:E2Rm:E1Rs:E1---

[1] One-cycle stall required before instruction execution.


Table 16.3 shows the operation of MOV and MOVN instructions.

Table 16.3. MOV and MOVN instructions

Shift typeCyclesSource1Source2Source3Source4Result1Result2
Immediate[1]1[Rd:E2]--Rd:E1/E2--
Register[1]1Rn:E1[Rd:E2]-Rd:E1/E2--
Shift by immediate, non-RRX[1]1Rn:E1[Rd:E2]-Rd:E1/E2--
Shift by immediate, RRX[2]1Rn:E1[Rd:E2]-Rd:E1/E2--
Shift by register1Rn:E1Rs:E1[Rd:E2]Rd:E1/E2--

[1] Result is available in E2 if conditional.

[2] Result is available in E2 if conditional. One-cycle stall required before instruction execution.


Copyright © 2006-2009 ARM Limited. All rights reserved.ARM DDI 0344I
Non-Confidential