4.1. About unaligned and mixed-endian data

The processor has the following features to support unaligned and mixed-endian data access:

Note

Instructions are always little-endian and must be aligned according to the size of the instruction:

  • 32-bit ARM instructions must be word-aligned with address bits [1:0] equal to b00.

  • 16-bit or 32-bit Thumb instructions must be halfword-aligned with address bit [0] equal to 0.

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