14.4.3. Configuration Code Extension Register

The Configuration Code Extension Register, at offset 0x1E8, is a read-only register that provides additional information about the configuration of the ETM. Figure 14.4 shows the bit arrangement of the Configuration Code Extension Register.

Figure 14.4. Configuration Code Extension Register format


Table 14.5 shows how the bit values correspond with the Configuration Code Extension Register functions. The Configuration Code Register has the value 0x0000898A.

Table 14.5. Configuration Code Extension Register bit functions

BitsFieldFunction

[31:16]

-

Reserved, RAZ.

[15:13]

Number of instrumentation resources

Specifies the number of instrumentation resources.

[12]

Data address comparisons not supported

Indicates that data address comparisons are supported by ETM.

[11]

Readable registers

Indicates that all registers, except some Integration Test Registers, are readable. See Table 14.2 for details of the access permission to the Integration Test Registers. Registers with names that start with IT are the Integration Test Registers, for example ITATBCTR1.

[10:3]

Size of extended external input bus

Specifies the size of the extended external input bus.

[2:0]

Number of extended external input selectors

Specifies the number of extended external input selectors.


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