3.2.2. c0, Main ID Register

The purpose of the Main ID Register is to return the device ID code that contains information about the processor.

The Main ID Register is:

Figure 3.1 shows the bit arrangement of the Main ID Register.

Figure 3.1. Main ID Register format


The contents of the Main ID Register depend on the specific implementation. Table 3.4 shows how the bit values correspond with the Main ID Register functions.

Table 3.4. Main ID Register bit functions

BitsFieldFunction

[31:24]

Implementor

Indicates the implementor, ARM:

0x41.

[23:20]

Variant

Indicates the variant number, or major revision, of the processor:

0x3.

[19:16]

Architecture

Indicates that the architecture is given in the feature registers:

0xF.

[15:4]

Primary part number

Indicates the part number, Cortex-A8:

0xC08.

[3:0]

Revision

Indicates the revision number, or minor revision, of the processor:

0x1.


Note

If an Opcode_2 value corresponding to an non-implemented or reserved ID register with CRm equal to c0 and Opcode_1 = 0 is encountered, the system control coprocessor returns the value of the Main ID Register.

Table 3.5 shows the results of attempted access for each mode.

Table 3.5. Results of access to the Main ID Register[1]

Secure privilegedNonsecure privilegedSecure UserNonsecure User
ReadWriteReadWriteReadWriteReadWrite
DataUndefinedDataUndefined Undefined Undefined Undefined Undefined

[1] An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.


To access the Main ID Register, read CP15 with:

MRC p15, 0, <Rd>, c0, c0, 0 ; Read Main ID Register

See c0, Processor Feature Register 0 - c0, Instruction Set Attributes Registers 5-7 for more information on the processor features.

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